The semiconductor industry has seen tremendous advances in technology in recent years that have permitted dramatic increases in circuit density and complexity, and equally dramatic decreases in power consumption and package sizes. Present semiconductor technology now permits single-chip microprocessors with many millions of transistors, operating at speeds of tens (or even hundreds) of MIPS (millions of instructions per second), to be packaged in relatively small, air-cooled semiconductor device packages. A by-product of such high density and high functionality in semiconductor devices has been the demand for increased numbers of external electrical connections to be present on the exterior of the die, and on the exterior of the semiconductor packages that receive the die for connecting the packaged device to external systems, such as a printed circuit board.
Ball grid array (BGA) packages are now used in many applications to provide the necessary number of external electrical connections on the die and on the exterior surface of the semiconductor packages. A BGA is a surface-mount chip package that uses a grid of solder balls for connectors. BGAs are available in both plastic and ceramic carriers. BGAs are noted for their compact size, high lead count and low inductance, that allows lower voltages to be used. BGA chips are easier to align to the printed circuit board, since the leads, which are called “solder balls” or “solder bumps,” are farther apart than leaded packages. The bonding pads are also located on the side of the die nearest the transistors and other circuit devices formed in the die. As a result, the electrical path to the pad is shorter than the electrical path associated with other packaging techniques. Connection to the package is made when the chip is flipped over and soldered. As a result, the ball grid array packaged dies are commonly referred to as “flip chips” in the industry. Each bump connects to a corresponding package inner lead. In some instances, the packages are also referred to as “Area Grid Array” packages or Chip Size Packages (CSPs).
A typical BGA package is characterized by a large number of solder balls or bumps disposed in an array on a surface of the package. It is not uncommon to have hundreds of solder balls or bumps in an array. The BGA package is assembled to a matching array of conductive pads. The pads are connected to other devices within a substrate or circuitry on a circuit board. Heat is applied to reflow the leads (solder balls or bumps) on the package, thereby wetting the pads on the substrates and, once cooled, forming electrical connections between the package and the semiconductor device contained in the package and the substrate.
Certain designs, for example communication and wireless LDI (Low Density Interconnect) packages, often need less than the maximum number of leads (bumps or balls) available or allowed on a die. As a result, the die will have depopulated BGA lands. Areas of depopulated lands are generally referred to as voided areas. Leads (bumps or balls) corresponding to the depopulated area of the die are also not provided on the package. As a result, the package also has a void or voided areas. The package also has a lesser amount of copper than a package which mates with a die that uses all the leads (bumps or solder balls). The voids generally result in less copper on the exterior layers, as well as between layers and within layers of the package having less than the maximum number of leads (balls or bumps) for the BGA. In some designs, the depopulation includes a significant percentage of the array. The result of the depopulation of a significant percentage of the array is a copper balance mismatch within a layer or layers of the package, and a copper balance mismatch between layers of the package. Copper imbalance in a substrate design can result in failures of the die and package.
Other types of packages also may have depopulated areas and have copper imbalances as well. There are many other types of packages including pin grid arrays, bump grid arrays, dual in line packages (DIPs), quad flat packs, gull wing surface mount, and other packages for dies.
Currently, copper imbalances are corrected by adding a copper mesh covering a portion or the entire area of the package devoid of copper. These current solutions use a significant amount of the surface area and hinder the designer when routing actual electrical paths within a layer or between layers of the package or die.
The description set out herein illustrates the various embodiments of the invention and such description is not intended to be construed as limiting in any manner.